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|    Message 1,454 of 2,547    |
|    ehsjr to DaveC    |
|    Re: How to calbrate a DC voltage?    |
|    05 Apr 15 00:56:27    |
      XPost: sci.electronics.components, sci.electronics.design       From: ehsjr@mverizon.net              On 4/4/2015 12:57 PM, DaveC wrote:       >> filter after the fet (else you end up cooking the fet)       >       > How would this happen? After filtering, the input to the FET would be DC       > (with some ripple I'm guessing), whereas without filter it's PWM. Wouldn't       > the DC input be less likely to do damage to the FET?       >       > What would cause damage to the FET if I filter before?       >       > Thanks.       >              Lets assume you have a 12 volt supply and a 6 ohm electro-       magnet for the following discussion, and that there must       be 1 amp through the electromagnet for proper operation.       6 ohms at 12 volts would draw 2 amps - 1 amp too high.              PWM circuits turn the FET fully on and fully off. When       fully on, the resistance between the drain and source       is lowest. (When turned on only part way, the drain-source       resistance will be higher.) With PWM the current required       by your electromagnet to do the job will be applied in pulses,       so you could provide twice the current needed for 1/2 the time.       If the drain-source resistance was .1 ohm (when the FET is       fully on), a bit less than .2 watts of power will be dissipated       in the FET.              With filtered PWM making a voltage is used to control the FET,       it won't be turned on and off - it will be turned on partly.       But it still has to reduce the current applied to the electromagnet       by 1/2. With the 12 volt supply and the 6 ohm electromagnet, the       FET drain-source resistance must be 6 ohms. That means the FET       must dissipate 6 watts.              That 6 watts will heat the FET MUCH more than the .2 watts       of heat produced in the PWM case. That heat can cook the fet.              When varying the voltage applied to the gate of the fet causes       the current between drain and source to vary, the fet is said to       be in linear mode. When increasing the voltage between the gate       and source results in no further increase in current between       drain and source, the fet is in saturation. An fet in saturation       will produce less heat than it would in the same circuit in linear       mode.              Ed              --- SoupGate-Win32 v1.05        * Origin: you cannot sedate... all the things you hate (1:229/2)    |
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