From: ohland@charter.net   
      
   Ryan, I'll have to dig a bit into the HITR to confirm this, but POS 5   
   has the channel check bit, which sets the function of POS 6 and 7.   
      
   POS 3 and 4 pass address or whatever from 6,7 , damn it Jim, I'm a   
   doctor, not an engineer. The patent does not seem to fully describe POS   
   5 bit 6, at least not in detail.   
      
   Louis Ohland wrote:   
   > The subaddress-pointer registers located at input/output ports 106(hex)   
   > and 107(hex) serve a dual function, storing channel check status   
   > information in addition to pointing to subaddressing data. A specially   
   > defined bit, called the channel check status indicator field and located   
   > at bit six in the register at I/O port 105(hex), shows which of the two   
   > functions these registers are performing at any given time. When the   
   > Channel Check Status Indicator Field shows a value of a logical zero, it   
   > means that registers 106(hex) and 107(hex) provide Channel Check status   
   > (or point to the location where this status information is stored). When   
   > this bit indicates a logical one, registers 106(hex) and 107(hex) can be   
   > used as pointers to subaddressing data.   
      
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