From: news@holzapfel.biz   
      
   It depends on what you are trying to see.   
   The complete signal list is about 120 wires.   
      
   For POS setup only?   
   Then CDSETUP#, CMD#, ADL#, S0#, S1#, M/IO#, A0-A2, D0-D7 will do.   
      
   A 32-bit IO or memory data transfer?   
   Probably CMD#, maybe ADL#, S0#, S1#, M/IO#, A0-A23, D0-D31 and BE0-BE3.   
      
   Even more for IRQs, extended bus cycles, burst transfers or DMA interaction.   
      
    > extra analyzer setting   
      
   The bus analysis consists of typically three preparation steps:   
      
   1) Wiring setup   
   The HP card is probably used to just break out the important MCA signals   
   onto the 104 wires the analyzer is able to capture, store and display.   
   So the HP card gives you a fixed assignment of the MCA signals onto its   
   headers where the analyzer plugs into.   
   Say analyzer line 1 = D0, line 2 = D1, ..., line 33 = A0, line 34 = A1,   
   ..., line 55 = CDSETUP#, ..., line 104 = M/IO#.   
   So the card makes it easy for you to plug all 104 or so wires of the   
   analyzer onto the bus - fine.   
      
   2) Name setup   
   Now you would have to setup the analyzer software that needs to know   
   this assignment too, in order to display what's going on on the bus.   
   Name signal 1 = D0, signal 2 = D2, ..., signal 33 = A0 etc.   
   Tedious work.   
      
   3) Protocol interpretation   
   Now we have all wires connected and all names set.   
   Say we captured 2 seconds of MCA transfers, what next? We would like to   
   interpret the captured transfers.   
   We know from the HITR that each transfer starts with CMD# going low,   
   then A0-A23 are driven to define the address that's being written (S0#   
   going low) or read (S1# going low), and the address is sampled when ADL#   
   goes low. Then the data lines are being driven...blah blah. It's all in   
   the HITR, and it defines the various transfer protocols of our glorious   
   Micro Channel. The logic analyzer needs to know those protocols, on the   
   properly wired and named signals to actually understand what's going on.   
   With this logic somehow implemented, usually by loading a specific file   
   that the analyzer can interpret, you (the operator) can now search for   
   and view actual transfers like "let me see the first moment when POS is   
   set up" or "what has been written to I/O 0x600h?   
   Those are good examples for typical questions that an analyzer operator,   
   probably a developer of an adapter or its driver, would like to have   
   answered by the logic analyzer.   
      
      
   Am 03.06.24 um 15:06 schrieb Louis Ohland:   
   > Magic Christian, how many signals need to be probed on a 32-bit MCA bus?   
   >   
   > Louis Ohland wrote:   
   >> I tracked the preprocessor down on Agilent, but no drivers or files.   
   >> As you expect from HP [or HPE], the website is a dumpster fire.   
   >>   
   >>  > extra analyzer setting   
   >>   
   >> Which means what? A macro? I'm totally clueless, never had any sort of   
   >> analysis in my past that was logical...   
   >>   
   >>  > name all... 104 channels manually and set up the triggers   
   >>   
   >> We wouldn't wandt to trigger anyone, would we?   
   >>   
   >> ChristianHolzapfel wrote:   
   >>> I used the MCA bus breakout headers on a Snark Barker while probing the   
   >>> 10/100 Mbps Ethernet (9-K) initialization phase of the AIX driver, plus   
   >>> a few extra flying wires for the upper 24 data lines the Snark Barker   
   >>> does not provide.   
   >>>   
   >>> I bet the HP card had an extra analyzer setting to go with the card, so   
   >>> you didn't have to name all the 104 channels manually and set up the   
   >>> triggers.   
      
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