XPost: sci.electronics.design, comp.arch.embedded, sci.electronics.basics   
   From: philallison@tpg.com.au   
      
   "Paul Keinanen"   
   >   
   >   
   > If the processor pin pull-down capability is low, the gate is   
   > practically floating and hence sensitive to any leakage through the   
   > triac or capacitively coupled inside the triac or in the circuitry.   
      
      
   ** The " gate " terminal of a triac is nothing like the gate terminal of a   
   mosfet or IGBT.   
      
   It does not need to be "pulled low" as it has an inherently low self   
   impedance in both polarities - normally there is an internal resistor   
   connected from gate to cathode of between 50 and a few hundred ohms.   
      
   Combine this fact with gate threshold voltages of 1.5 volts in both   
   polarities and trigger currents of around  5 to 50 mA and you see the   
   devices are not gate sensitive at all.   
      
      
   .....    Phil   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)