From: nowhere@never.at   
      
   On 13.07.2021 03:41, muta...@gmail.com wrote:   
   > On Monday, July 12, 2021 at 11:30:40 AM UTC+10, muta...@gmail.com wrote:   
   >   
   >> 24-bit addressing, and a theoretical x86 processor with   
   >> 32-bit addressing. Come to think of it, it might be possible   
   >> to use an actual 80386 to do effective 16-bit segment   
   >> shifts. Or surely I can at least match the 80286 and do   
   >> (effective) 8-bit shifts. That would be a load of fun.   
   >> I guess it depends how many selectors I can define on   
   >> the 80386. I'll run everything in supervisor mode, so I   
   >> can use both GDT and LDT if that helps.   
   >   
   > I looked up Wikipedia:   
   >   
   > https://en.wikipedia.org/wiki/Global_Descriptor_Table   
   >   
   > and there are 8192*2 selectors available, meaning that   
   > 16-bit programs can access 1 GiB maximum.   
      
   > 4-bit segment shifts make sense when there is 1 MiB of   
   > memory available.   
      
   you totally misunderstood how descriptors work.   
   1. GDT/LDT are only in effect in PM and VM   
   2. a GDT entry can span a 4GB memory range.   
   3. a descriptor can be set for either 16 or 32 bit limit.   
   4. there are several descriptor types [code/data/TSS].   
   5. the count of entries got nothing to do with accessible range.   
   6. segment descriptors ARE NOT extended RM-segment registers,   
       they work complete different.   
   __   
   wolfgang   
      
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