From: muta...@gmail.com   
      
   On Friday, July 16, 2021 at 6:27:05 AM UTC+10, Scott Lurndal wrote:   
      
   > >Also, it is sounding like this will work in PM32. Will it also   
   > >work in long mode? I'm not familiar with their selectors   
   > >or anything else.   
      
   > Long mode doesn't use selectors. There is one flat physical address   
   > space (2^40 to 2^64 bits in size depending on processor implementation).   
      
   Ok, thanks. In that case, my huge memory model programs,   
   on a machine with 4 GiB of memory, should be able to do   
   a divide of 64k followed by a multiply of 1, right?   
      
   Do I lose the ability to lose some 16-bit instructions,   
   even compared to PM32?   
      
   Scratch that. I just realized - my 8086 programs need   
   to manipulate segment registers. PM32 with 512 MiB   
   addressability is as high as I can go unless some other   
   processor provides more selectors. Or instead of   
   selectors, flexible shifts instead of a hardcoded 4.   
   Well, a hardcoded 16 would be fine these days too,   
   if such a processor (or mode) is made.   
      
   > Once paging is enabled, the virtual address is a full 64-bits.   
      
   I'm not interested in paging except if it fixes a problem   
   with what I wanted to do un-paged, e.g. fill holes caused   
   by the A20 line not being enabled, or blocking NULL pointer   
   assignment, or protecting low memory so the OS can   
   protect itself. But I don't want to consider that for the   
   moment. I'm still trying to write 8086 programs "properly".   
      
   > Segment registers (e.g. %fs, %gs) can be loaded with an address that will   
   > be summed with the computed operand address when the segment override is   
   > used. There are special instructions to load and swap %fs values. Linux   
   > uses a segment register to point to per-core operating system data.   
      
   Ok, I don't need that at the moment. I'm just trying to   
   get the equivalent of MSDOS to work. Single core.   
      
   > This is all documented in the Intel reference manuals, which you   
   > should be intimately familiar with if you desire to write an operating   
   > system for the intel processor family.   
      
   If I had done that, I would have been stuck in a rut.   
      
   It took more than 10 years I think for "separate memory"   
   to be invented (by somitcw) to solve the problem of   
   multiple ATL address spaces, despite the solution being   
   very obvious and conceptually simple once verbalized.   
   Despite plenty of good brains being thrown at the   
   problem. Absolutely everyone, including him, was stuck   
   in a rut. Even then he didn't create it in a vacuum, but as   
   part of yet another discussion on how to solve the problem.   
      
   I just need a little bit of specific knowledge to help me on   
   my way for the ultimate 8086+ processor. If that matches   
   what Intel/AMD came up with, cool.   
      
   BFN. Paul.   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)