muta...@gmail.com  wrote:   
   > On Friday, July 16, 2021 at 10:56:55 AM UTC+10, Joe Monk wrote:   
   >   
   > > > The same way that z/Arch running in AM64 executes   
   > > > a LR R3,R4 perfectly fine.   
   > > >   
   > > > So too the 80386 will execute "mov ax, bx" perfectly fine,   
   > > > in exactly the same manner as the 8086.   
   > > >   
   > > > At least I think it will. I'm more familiar with S/3X0   
   > > > assembler than x86.   
   >   
   > > On an S/370, an LR R3,R4 is a 32-bit move. Same for S/390, and z/Arch.   
   > >   
   > > On an 8086, a mov ax,bx is a 16-bit instruction. Same on the 80386. In   
   PM32, that register is called EAX. AX only references the lower 16 bits of EAX.   
   > >   
   > > See the problem? They're not the same operations.   
   >   
   > In the same way that z/Arch supports both 32-bit and 64-bit operations,   
   > the 80386 supports both 16-bit and 32-bit operations.   
   >   
   > You can do a mov ax, bx on both the 8086 and the   
   > 80386 (even in normal PM32, forget RM16, forget   
   > V8086).   
   >   
   > Or am I missing something?   
      
   It is not "the same way".  I did not check all details of modes   
   on z/Arch, but x86 way is strange: 16-bit operations preserve   
   upper bits, 32-bit operation extend by zero.  Operand size   
   reverts mode.  IIUC RISC machines have separate 32-bit and   
   64-bit instructions, they sign-extend instead of zero extend   
   or preserving high bits.   
      
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