From: muta...@gmail.com   
      
   On Saturday, July 17, 2021 at 8:59:08 AM UTC+10, Joe Monk wrote:   
      
   > > If Intel thinks the 8086 was a kludge, that's up to them.   
   > > But I disagree with Intel. It was the correct technical   
   > > solution.   
      
   > Intel does in fact think the 8086/8088 was a kludge.   
   >   
   > Post 8080/8085, we were supposed to get the iAPX 432.   
      
   > the iAPX 432 programming model is a stack machine with no visible   
   general-purpose registers.   
      
   That processor with no visible registers sounds like a   
   pie-in-the-sky design to me. You may as well design   
   the x64 in 1970. You can do anything on paper.   
      
   Regardless, it doesn't have to be exactly the 8086.   
      
   The generic thing is segmented memory with a   
   segment shift that may or may not be the same   
   as the register size.   
      
   And with an instruction set that matches an actual   
   processor of that same register size that was   
   effectively operating in tiny memory model (ie it had   
   no concept of segment registers, and the implied   
   segment registers were effectively the same,   
   effectively 0).   
      
   Explain to me why segmented memory is not the   
   right approach to solving this problem in an   
   environment with severe limits on memory, but   
   still more than a single register can address.   
      
   BFN. Paul.   
      
   --- SoupGate-Win32 v1.05   
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