From: nowhere@nevernet.at   
      
   On 26/02/2022 18:04, James Harris wrote:   
   ...   
   > For example, starting in real mode   
   >   
   >    mov ax, 7   
   >    mov es, ax  <--- ok in real mode, sets ES /selector and base/   
   >   
   >    mov eax, cr0   
   >    or eax, 1   
   >    mov cr0, eax  <--- enter protected mode   
   >    jmp $ + 2   
   >   
   >    mov ax, es   
   > then that should put a 7 into AX even though the CPU is in Pmode.   
   > Just for fun. :)   
      
   yes of course, even a first attempt to access with ES would crash.   
   I ask again what you assume to be: base limit and PL of this pre-PM.   
      
   if the base would be 0000 or 07C0 then non of my switches would work.   
   and why should it be 07c0 ?  my switches aren't in this region.   
      
   >>> Yes, and Unreal Mode shows that CPUs use PM mechanisms AT ALL TIMES,   
   >>> even when they are running in what we call "Real Mode".   
   >>   
   >> If it would be in PM then all the PM instructions I listed earlier   
   >> would not crash or raise exceptions. Go figure :)   
   >   
   > AIUI - at least on Intel - the instructions you listed should all   
   > execute if PE = 1 and raise exception 6 if PE = 0. Is that not what   
   > happens on your hardware?   
      
   not quite accurate, AMD-docs tell explicit that privileged instructions   
   work only in PM and not in UNREAL mode.   
   I didn't try by intention, but I remember some hard  crashes during my   
   first attempts (>30 years ago) on making mixed modes work.   
      
   So between setting PE and loading CS there is the UNREAL story where   
   the CPU behave partly as PM (seg-regs) but wont execute PM only code.   
   __   
   wolfgang   
      
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