From: james.harris.1@gmail.com   
      
   On 25/03/2022 19:46, wolfgang kern wrote:   
   > On 25/03/2022 10:50, James Harris wrote:   
   >> On 25/03/2022 07:33, wolfgang kern wrote:   
   >>> On 23/03/2022 18:50, James Harris wrote:   
   >>> [agreed..]   
   >>>> For Intel and probably AMD it looks as though one can get the CPU to   
   >>>> report the Limit with an LSL instruction and the Attributes with LAR   
   >>>> but I don't know a way to get the base.   
   >>>   
   >>> get_base:        ;selector in eax assume DS=flat   
   >>>    MOV esi,anybuffer   
   >>>    SGDT [ds:esi]   ;now you know where the GDT resides   
   >>>    AND eax,FFF8    ;just in case   
   >>> ; SHL eax,3       ;mul by 8   
   >>> ; ADD esi,eax   
   >>>    LEA esi,[eax*8+esi]   ;same as the two lines above but   
   faster/shorter   
   >>>    MOV ecx,[esi+2]       ;low 24 bits of base   
   >>>    AND ecx,00FFFFFF   
   >>>    MOV bl,[esi+7]   
   >>>    SHL ebx,24            ;decimal yet!   
   >>>    OR ecx,ebx            ;ecx hold 32 bit base of selector   
   eax yet   
   >>>   
   >>> it works on both code and data descriptors.   
   >>   
   >> What if the segreg (and, hence, its Base) had been loaded before   
   >> switching to Pmode?   
   >   
   > As long a GDT is already installed this works with 66 and 67 overrides   
   > also in RM.   
      
   That's not what I mean. Rather, let's say selector and base had been   
   loaded in Real Mode, then you switched to Protected Mode, your SGDT   
   wouldn't tell you anything useful for such a case because the base   
   wouldn't have been loaded from the GDT.   
      
   In short, LSL will report the limit but nothing (AFAIK) will report the   
   base. It's not a problem, BTW, just an observation that there's no   
   equivalent of LSL for the base.   
      
      
   --   
   James Harris   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)