muta...@gmail.com  wrote:   
   > On Saturday, April 23, 2022 at 2:25:13 AM UTC+10, Alexei A. Frounze wrote:   
   >   
   > > One typical solution is to split the compiler into several   
   > > stages, each executing the other as a separate program   
   > > with the communication between them done via files   
   > > containing intermediate results.   
   >   
   > Ok, but that requires the programmer to change the   
   > way they program, because the code they would   
   > naturally write exceeds 64k of machine code.   
   >   
   > My question is - is the 8086 the only processor that   
   > still has 16-bit registers, but allows the naturally-written   
   > program with more than 64k of machine code, to   
   > be built by a compiler?   
   >   
   > Or is there some other technique that would work on   
   > the Commodore 128 or some other machine that   
   > allowed more than 64k of memory with only 16-bit   
   > or 8-bit registers?   
      
   There were word addressable machines.  You still have   
   64k limit, but in 16-bit words, so effectively twice   
   as large program.  There are machines with separate   
   data and code address spaces.  For example Atmel   
   processors have 8 bit registers, 64k bytes data space   
   and 64k words program space.  So maximal program   
   effectively can use 192 kB memory (128kB code and   
   64kB data).   
      
   MSP-430X is cheating: while normal data instructions   
   treat registers as 16 bit there are extra four bits   
   available to special instructions and addressing.   
   So it looks mostly like 16-bit processor but really   
   is 20-bit.   
      
   STM8 has (single) 8-bit data register, 8bit conditon   
   code register, 2 16-bit index registers, logically   
   16-bit stack pointer and logically 24-bit program   
   counter.  I write "logically" above because in   
   practice stack pointer and program counter need   
   only bits corresponding to existing memory.  STM8   
   uses indirect addressing which can use up to 3   
   bytes as address, so can address 16 MB of memory.   
      
   You probably will disqualify STM8 as despite 16-bit   
   registers it allows 24-bit linear address.  But note   
   that STM8 is logically rather similar to 6502   
   (which was used in Commodore 64).  My guess is that   
   STM8 could be implemented with complexity similar   
   to Z80 (Z80 was approximatly twice as large as 6502)   
   and much smaller than 8086.   
      
   Note: STM8 is relatively modern design (probably   
   around 2006), but historically there where several   
   processors similar to 6502 but having bigger (   
   but within 16-bit limit) registers.  I do not know   
   if any of them allowed addressing more than 65kB of   
   memory, but that would be natural extention.   
      
   OTOH current market for small, but bigger than 64 kB   
   processors is dominated by ARM, with MIPS and RISCV   
   as main competitors.  Each of the above has 32-bit   
   registers.   
      
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