From: muta...@gmail.com   
      
   On Tuesday, August 30, 2022 at 5:17:36 AM UTC+8, Scott Lurndal wrote:   
   > "muta...@gmail.com"  writes:   
   > >On Tuesday, July 13, 2021 at 1:14:37 AM UTC+8, Scott Lurndal wrote:   
   > >> Rod Pemberton  writes:   
   > >> >On Fri, 9 Jul 2021 18:04:18 -0700 (PDT)   
   > >> >"muta...@gmail.com"  wrote:   
   > >> >   
   > >> >> The more I look at the 8086, the more I am happy   
   > >> >> that segmentation was the correct technical   
   > >> >> solution to cope with machines that still had a   
   > >> >> 16-bit processor and registers, but had more than   
   > >> >> 64k memory available to them. I just would have   
   > >> >> made the segment shift flexible instead of telling   
   > >> >> everyone that "4" was being set in stone.   
   > >> >   
   > >> >They would've been wiser to split a 32-bit address across two registers   
   > >> >instead of using a 4-bit shift and add. That would've allowed for an   
   > >> >easier transition to 32-bit.   
   > >> A waste of scarce resources (registers). Consider also the   
   > >> required logic (and the process in the 1980s - the 8080 was 6um,   
   > >> 8086 was 3um). Today, 5nm is in production and 3nm is coming soon,   
   > >> that's 1000 times finer).   
   > >   
   > >   
   > >Would it have been possible within the limits   
   > >of late 70s/early 80s technology to have an   
   > >Instruction or jumper to switch between 4 and 5 bit   
   > >segment shifts at a minimum?   
   > Anything is possible. But the design, engineering and   
   > testing of such a feature would add cost, for no gain.   
      
   Not everything is possible. Intel couldn't   
   have fabricated an x64 in 1978.   
      
   So can you tell me what is possible and what   
   the extra cost is for each option. Are we talking 1%, 10%, 100% extra?   
      
   One option would be to have an 8086   
   exactly as is, and a new processor, 8086-5,   
   which is exactly the same except 5 bit shifts.   
      
   The os software needs to know which of the   
   2 processors it is running on.   
      
   If necessary, 2 versions of the os could be   
   produced, but that's pretty crappy.   
   Although it could be done in a way that just   
   one byte needs to be zapped with either 4 or 5.   
      
   Another option would be to have a modified   
   8086 that has an instruction to set the desired   
   shift, with an initial value of 4.   
      
   Another option would be an additional   
   instruction to let you know if this processor is a   
   fixed 4 or 5 bit shift.   
      
   Another option would be a bios call to   
   determine the unchanging shift value of   
   the current processor.   
      
   What would you recommend within the   
   constraints of late 70s hardware and my   
   desire for a flexible shift value, not   
   necessarily immediately, but with a new   
   8086-5+ to be released in the mid 80s.   
      
   I'm looking to address 2 MB. When   
   could that much memory be bolted on?   
      
   --- SoupGate-Win32 v1.05   
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