From: muta...@gmail.com   
      
   On Monday, October 24, 2022 at 6:14:04 AM UTC+8, Joe Monk wrote:   
   > > And on the theoretical NEC hardware I described above, it   
   > > will instead be:   
   > >   
   > > 2B0:013 and 1E0:003 that point to the same physical address in memory.   
   > >   
   > Impossible.   
   >   
   > 1E0, shifted 5 left , is 3C0.   
   >   
   > 2B0, shifted 5 left, is 560.   
      
   Ok, so I stuffed up the maths again.   
      
   I suspect you know what I mean, but if you insist I can try a 3rd   
   time to get the maths right. :-)   
      
   > > And the existing code base doesn't care one iota because it doesn't   
   > > hardcode EITHER of those addresses, nor does it even attempt to   
   > > compare such disparate addresses (it would fail if it did, because   
   > > C code doesn't normally normalize pointers before comparison).   
   > >   
   > The existing code base is written that DS, CS, ES, etc are 4 bit shifts,   
   performed by hardware.   
      
   Not true.   
      
   Take a look at the assembler generated by a C compiler.   
      
   It doesn't know or care what the segment registers are set to or   
   what the shift amount is.   
      
   The segments get loaded with values that were set by the OS   
   at load time, typically. The program wouldn't be relocatable   
   otherwise.   
      
   BFN. Paul.   
      
   --- SoupGate-Win32 v1.05   
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