From: joemonk64@gmail.com   
      
   "The following instructions leave bits 0-31 of a general register unchanged in   
   the 24-bit or 31-bit addressing mode but place or update address or length   
   information in them in the 64-bit addressing mode:   
      
   BRANCH AND LINK (BAL, BALR)   
   BRANCH AND SAVE (BAS, BASR)   
   LOAD ADDRESS   
      
   Bits 0-31 of general registers are changed by three types of instructions. The   
   first type is a modal instruction, as listed in the preceding note, when the   
   instruction is executed in the 64-bit addressing mode...   
      
   So, when you are on a z/Arch box, in AMODE 64, and you execute a BALR, BASR,   
   or LA, you operate on 64 bits, in a 64 bit register, using a 64 bit address.   
      
   It gets even better on a newer z/Arch machine (z14 up) because they cannot be   
   IPL'd in anythiing but AMODE 64 (I.e. no ESA/390). So as soon as you execute:   
      
   BALR R12,0   
   USING *,R12   
      
   You have just established 64-bit addressing. Looking at your code:   
      
   * Start of our own, somewhat normal, code. Registers are not   
   * defined at this point, so we need to create our own base   
   * register.   
   *   
   POSTIPL  DS    0H   
            BALR  R12,0   
            LA    R12,0(R12)   
            BCTR  R12,0   
            BCTR  R12,0   
            USING POSTIPL,R12   
            USING PSA,R0   
      
   Joe   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)