From: cross@spitfire.i.gajendra.net   
      
   In article ,   
   Scott Lurndal  wrote:   
   >cross@spitfire.i.gajendra.net (Dan Cross) writes:   
   >>In article ,   
   >>Scott Lurndal  wrote:   
   >>>cross@spitfire.i.gajendra.net (Dan Cross) writes:   
   >>>>Oh cool.  I always thought that MIPS would be hard to virtualize   
   >>>>because of the ksegs and soft-TLBs.   
   >>>   
   >>>Indeed, it took another decade and a half before MIPS added   
   >>>virtualization support to the architecture, IIRC;  Cavium   
   >>>was also a MIPS shop (until 2012, when we started the switch   
   >>>to ARM64) and we had looked at the MIPS virtualization extensions around   
   >>>that time.   
   >>   
   >>Same with x86, of course: how long after VMWare did their   
   >>binary-rewriting thing before Intel introduced VMX?   
   >   
   >AMD implemented SVM before Intel did VMX.  It was   
   >generally available circa 2005, so a few years after VMware.   
      
   Other way around, wasn't it?  Intel released VMX in late 2005   
   while AMD released SVM in mid 2006.   
      
   >>>The SGI skunkworks project used a 2 processor HP Kayak with   
   >>>Pentium II (IIRC) processors; we had an instance of windows   
   >>>running alongside an instance of linux.   Microsoft had   
   >>>given us the source for NT4 - this was about the time   
   >>>that SGI was looking to move the graphics workstations   
   >>>to intel/microsoft based boxen.   
   >>   
   >>Ah, very interesting; this was roughly the same era as VMWare's   
   >>initial offerings: I'm guessing you pulled the same incrememntal   
   >>rewriting trick they did?   
   >   
   >It's been a while now, but the initial take was more paravirtualization   
   >a la xen.   
      
   That makes sense.   
      
   >>>>  It was never clear to me   
   >>>>how a hypervisor could, in general, know the format of the guest   
   >>>>page tables.  I know the Disco folks had to make some changes to   
   >>>>Irix to get it to work.   
   >>>   
   >>>When I was working on IRIX, I was not fond of either the software   
   >>>managed TLB, coloring or the Kseg stuff; the MIPS project I worked on was   
   called   
   >>>Teak and was a distributed version of Irix (eventually cancelled)   
   >>>for networks of R10k boxes.   
   >>   
   >>I get it from a hardware perspective: fewer transistors with a   
   >>software-managed TLB, but man...so many drawbacks.   
   >   
   >True.  I'm quite grateful that we can now squeeze a hundred   
   >billion transistors on a single SoC :-).   
      
   All running at multi-gigahertz speeds.  Quite the times we live   
   in.   
      
   	- Dan C.   
      
   --- SoupGate-Win32 v1.05   
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