From: cross@spitfire.i.gajendra.net   
      
   In article ,   
   muta...@gmail.com  wrote:   
   >On Tuesday, April 4, 2023 at 7:20:02 PM UTC+8, Dan Cross wrote:   
   >> >> >Ok, so the proposed laptop could be built, and cover both   
   >> >> >memory-mapped I/O and "legacy IO".   
   >> >   
   >> >> That would be a silly design if your intent is to work with a   
   >> >> CPU that doesn't even have programmed IO instructions, let alone   
   >> >> the sort of external bus cycles required for PIO to work.   
   >> >   
   >> >The intent is to allow the user to zap either CPU type   
   >> >onto the FPGA.   
   >   
   >> Now you're back to the original problem of trying to shoehorn a   
   >> MIPS core into a system designed around an x86 core, or the   
   >> inverse, which is what I already told you was problematic.   
   >   
   >That *is* the solution to the original problem. A serial   
   >port that can be driven by either MMIO or legacy IO.   
   >   
   >It's not a silly design. It allows flexibility of CPU loading   
   >onto the FPGA.   
   >[snip]   
      
   You don't seem to be aware that an x86 CPU can also use MMIO for   
   a serial port, provided that serial port supports MMIO already.   
   So if you have a UART that already supports MMIO, you don't   
   _need_ the legacy port-IO based support.  If you're already   
   modifying a hobbyist OS to support MMIO access to the serial   
   port for, say, a MIPS-like CPU core, then you can just use that   
   same support code on x86 as well.   
      
   But more generally you seem to think that the only thing that is   
   important are driving simple devices like a UART, but there is a   
   lot more that goes into a modern computer, particularly a device   
   in the laptop class.  Perhaps if you took some time to learn   
   something about computer architecture this would make a little   
   more sense to you.   
      
   	- Dan C.   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)