[continued from previous message]   
      
     3	delta data carrier detect (DDCD)   
     2	trailing edge ring indicator (TERI)   
     1	delta data set ready (DDSR)   
     0	delta clear to send (DCTS)   
   Notes:	bits 0-3 are reset when the CPU reads the MSR   
   	bit 4 is the Modem Control Register RTS during loopback test   
   	bit 5 is the Modem Control Register DTR during loopback test   
   	bit 6 is the Modem Control Register OUT1 during loopback test   
   	bit 7 is the Modem Control Register OUT2 during loopback test   
   SeeAlso: #P0880,#P0881,#P0882   
      
   eof   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)