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   Message 129,264 of 131,241   
   Waldek Hebisch to Scott Lurndal   
   Re: VAX   
   05 Aug 25 20:34:27   
   
   From: antispam@fricas.org   
      
   Scott Lurndal  wrote:   
   > antispam@fricas.org (Waldek Hebisch) writes:   
   >>Anton Ertl  wrote:   
   >>> antispam@fricas.org (Waldek Hebisch) writes:   
   >>>>I can understand why DEC abandoned VAX: already in 1985 they   
   >>>>had some disadvantage and they saw no way to compete against   
   >>>>superscalar machines which were on the horizon.  In 1985 they   
   >>>>probably realized, that their features add no value in world   
   >>>>using optimizing compilers.   
   >>>   
   >>> Optimizing compilers increase the advantages of RISCs, but even with a   
   >>> simple compiler Berkeley RISC II (which was made by hardware people,   
   >>> not compiler people) has between 85% and 256% of VAX (11/780) speed.   
   >>> It also has 16-bit and 32-bit instructions for improved code density   
   >>> and (apparently from memory bandwidth issues) performance.   
   >>   
   >>The basic question is if VAX could afford the pipeline.  VAX had   
   >>rather complex memory and bus interface, cache added complexity   
   >>too.  Ditching microcode could allow more resources for execution   
   >>path.  Clearly VAX could afford and probably had 1-cycle 32-bit   
   >>ALU.  I doubt that they could afford 1-cycle multiply or   
   >>even a barrel shifter.  So they needed a seqencer for sane   
   >>assembly programming.  I am not sure what technolgy they used   
   >>for register file.  For me most likely is fast RAM, but that   
   >>normally would give 1 R/W port.  Multiported register file   
   >>probably would need a lot of separate register chips and   
   >>multiplexer.  Alternatively, they could try some very fast   
   >>RAM and run it at multiple of base clock frequency (66 ns   
   >>cycle time caches were available at that time, so 3 ports   
   >>via multiplexing seem possible).  But any of this adds   
   >>considerable complexity.  Sane pipeline needs interlocks   
   >>and forwarding.   
   >   
   > We tend to be spoiled by modern process densities.   The   
   > VAX 11/780 was built using SSI logic chips, thus board   
   > space and backplane wiring were significant constraints   
   > on the logic designs of the era.   
      
   Using terminology of late seventies VAX was mixture of SSI,   
   MSI and LSI chips.  I am not sure if VAX used it, but there   
   were 4-bit TTL ALU chips, 8 such chips would give 32-bit ALU   
   (for better speed one would add carry propagation chips,   
   which would increase chip count).   
      
   Probably only memory used LSI chips.  That could add bias   
   for microcode: microcode used densest MOS chips (memory) and   
   replaced less dense random TTL logic.  After switching to CMOS   
   on-chip logic was more comparable to memory, so balance   
   shifted.   
      
   --   
                                 Waldek Hebisch   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)   

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