From: ThatWouldBeTelling@thevillage.com   
      
   Thomas Koenig wrote:   
   > Dan Cross  schrieb:   
   >> In article <106uqki$36gll$4@dont-email.me>,   
   >> Thomas Koenig   wrote:   
   >>> Dan Cross  schrieb:   
   >>>> In article <44okQ.831008$QtA1.573001@fx16.iad>,   
   >>>> Scott Lurndal  wrote:   
   >>>>> [snip]   
   >>>>> We tend to be spoiled by modern process densities.   The   
   >>>>> VAX 11/780 was built using SSI logic chips, thus board   
   >>>>> space and backplane wiring were significant constraints   
   >>>>> on the logic designs of the era.   
   >>>> Indeed.  I find this speculation about the VAX, kind of odd: the   
   >>>> existence of the 801 as a research project being used as an   
   >>>> existence proof to justify assertions that a pipelined RISC   
   >>>> design would have been "better" don't really hold up, when we   
   >>>> consider that the comparison is to a processor designed for   
   >>>> commercial applications on a much shorter timeframe.   
   >>> I disagree.  The 801 was a research project without much time   
   >>> pressure, and they simulated the machine (IIRC at the gate level)   
   >>> before they ever bulit one.  Plus, they developed an excellent   
   >>> compiler which implemented graph coloring.   
   >>>   
   >>> But IBM had zero interest in competition to their own /370 line,   
   >>> although the 801 would have brought performance improvements   
   >>> over that line.   
   >> I'm not sure what, precisely, you're disagreeing with.   
   >>   
   >> I'm saying that the line of though that goes, "the 801 existed,   
   >> therefore a RISC VAX would have been better than the   
   >> architecture DEC ultimately produced" is specious, and the   
   >> conclusion does not follow.   
   >   
   > There are a few intermediate steps.   
   >   
   > The 801 demonstrated that a RISC, including caches and pipelining,   
   > would have been feasible at the time.  It also demonstrated that   
   > somebody had thought of graph coloring algorithms.   
   >   
   > There can also be no doubt that a RISC-type machine would have   
   > exhibited the same performance advantages (at least in integer   
   > performance) as a RISC vs CISC 10 years later.  The 801 did so   
   > vs. the /370, as did the RISC processors vs, for example, the   
   > 680x0 family of processors (just compare ARM vs. 68000).   
   >   
   > Or look at the performance of the TTL implementation of HP-PA,   
   > which used PALs which were not available to the VAX 11/780   
   > designers, so it could be clocked a bit higher, but at   
   > a multiple of the performance than the VAX.   
   >   
   > So, Anton visiting DEC or me visiting Data General could have   
   > brought them a technology which would significantly outperformed   
   > the VAX (especially if we brought along the algorithm for graph   
   > coloring.  Some people at IBM would have been peeved at having   
   > somebody else "develop" this at the same time, but OK.   
   >   
      
   Signetics 82S100/101 Field Programmable Logic Array FPAL (an AND-OR matrix)   
   were available in 1975. Mask programmable PLA were available from TI   
   circa 1970 but masks would be too expensive.   
      
   If I was building a TTL risc cpu in 1975 I would definitely be using   
   lots of FPLA's, not just for decode but also state machines in fetch,   
   page table walkers, cache controllers, etc.   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)