From: anton@mips.complang.tuwien.ac.at   
      
   scott@slp53.sl.home (Scott Lurndal) writes:   
   >EricP  writes:   
   >>Signetics 82S100/101 Field Programmable Logic Array FPAL (an AND-OR matrix)   
   >>were available in 1975. Mask programmable PLA were available from TI   
   >>circa 1970 but masks would be too expensive.   
   >   
   >Burroughs mainframers started designing with ECL gate arrays circa   
   >1981, and they shipped in 1987[*].   I suspect even FPAL or other PLAs   
   >would have been far to expensive to use to build a RISC CPU,   
      
   The Signetics 82S100 was used in early Commodore 64s, so it could not   
   have been expensive (at least in 1982, when these early C64s were   
   built).  PLAs were also used by HP when building the first HPPA CPU.   
      
   >especially for one of the BUNCH, for whom backward compatability was   
   >paramount.   
      
   Why should the cost of building a RISC CPU depend on whether you are   
   in the BUNCH (Burroughs, UNIVAC, NCR, Control Data Corporation (CDC),   
   and Honeywell)?  And how is the cost of building a RISC CPU related to   
   backwards compatibility?   
      
   - anton   
   --   
   'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'   
     Mitch Alsup,    
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)