From: ThatWouldBeTelling@thevillage.com   
      
   EricP wrote:   
   > Terje Mathisen wrote:   
   >> EricP wrote:   
   >>> Terje Mathisen wrote:   
   >>>> Anton Ertl wrote:   
   >>>>> Terje Mathisen  writes:   
   >>>>>   
   >>>>>> This would have simplified all sorts of array/matrix sw where both   
   >>>>>> errors (NaN) and missing (None) items are possible.   
   >>>>>   
   >>>>> In what ways would None behave differently from SNaN?   
   >>>>   
   >>>> It would be transparently ignored in reductions, with zero overhead.   
   >>>   
   >>> There is also the behavior with operators - how is it different from   
   >>> xNan?   
   >>> xNan behaves like an error and poisons any calculation it is in,   
   >>> which is also how SQL behaves wrt NULL values:   
   >>>   
   >>>    value + xNan => xNan   
   >>>    value * xNan => xNan   
   >>>   
   >>> whereas Null is typically thought of as a missing value:   
   >>>   
   >>>    value + Null => value?   
   >>>    value * Null => 0?   
   >>>   
   >>> It could also have different operator instruction options that select   
   >>> different behaviors similar to rounding mode or exception handling bits.   
   >>> All those option bits would take up a lot of instruction space.   
   >>   
   >> I'm used to the Mill None, where a store becomes a NOP, a mul behaves   
   >> like x * 1 (or a NOP), same for other operations.   
   >>   
   >> Terje   
   >>   
   >   
   > I was thinking of spreadsheet style rules for missing cells.   
   > Something that's compatible with dsp's, simd, vector, and gpu's,   
   > but I don't know enough about all their calculations to know the   
   > different ways calculations handle missing values.   
   >   
   > And there can be different None rules just like different roundings.   
      
   Musing about errors...   
      
   As exceptions can be masked one might also be want to make a   
   distinction between generated and propagated Nan,   
   as well as the reason for Nan.   
      
   Something like this for Nan high order fraction bits:   
   - 1 bit to indicate 0=Quite or 1=Signalled   
   - 1 bit to indicate 0=Generated or 1=Propagated   
   - 4 bits to indicate error code with   
      0 = Missing or None   
      1 = Invalid operand format   
      2 = Invalid operation   
      3 = Divide by zero   
      etc   
      
   If any source operand is a Nan marked Generated the the result is a Nan   
   with the same error code but Propagated. If multiple source operands   
   are Nan then some rules on how to propagate the Nan error value   
   - if any is Signalled then result is Signalled,   
   - if all Nan source operands are error code None then the result is None   
      otherwise the error code is one of the >0 codes.   
      
   And (assuming instruction bits are free and infinitely available)   
   instruction bits to control how each deals with Nan source values   
   and how to handle each (fault, trap, propagate, substitute),   
   how it generates Nan (quite, signalled) for execution errors,   
   and various exception condition enable flags (denorm, overflow,   
   underflow, Inexact, etc).   
      
   --- SoupGate-Win32 v1.05   
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