From: user5857@newsgrouper.org.invalid
Thomas Koenig posted:
> John Savard schrieb:
> > On Mon, 28 Jul 2025 04:39:56 +0000, Thomas Koenig wrote:
> >> John Savard schrieb:
> >
> >> In order to avoid NOP hell, these have to be filled with the same
> >> instruction length (say 15 bits, like you said above),
> >> is that correct?
> >
> > A block is 256 bits in length, and normally, in the absence of a
> > header, consists of eight 32-bit instructions. Blocks need, basically,
> > to be filled with 32-bit instructions to avoid NOPs.
>
> That sounds straightforward.
>
> > To improve the compactness of code, I have made provision for short
> > instructions; these are nominally 16 bits long, as they're packed
> > two to a 32-bit word.
>
> Still straightforward.
>
> > They can, in reality, be 14 bits long or 15 bits
> > long, depending on the overhead of indicating them, or 17 bits long or
> > even longer if some additional bits are provided in the header.
>
> >
> > Some headers provide for variable-length instructions. Those headers,
> > instead of just being either 32 bits or 64 bits long, can also be
> > 48 bits long.
>
> Please provide an example of an assembly sequence, how this
> woult look like.
>
> > The feature I mentioned in the post to which you are replying,
> > for avoiding NOP issues, has to do with data, specifically immediate
> > values in instructions, rather than the instructions themselves.
>
> Data in the instruction stream have to be considered part
> of the instruction for any reasonable purposes.
>
> I'm afraid I do not understand in the absence of an example.
> Could you code up an example of a simple function that uses
> these features?
>
> > In order to keep length decoding of instructions simple - or allow code
> > that consists only of 32-bit instructions - but allow immediate values
> > of any length, what I had done was come up with a scheme that does the
> > following:
> >
> > In a register-to-register operate instruction, a source register
> > specification can be replaced with a 5-bit pointer to data; it points
> > to one of the bytes in a 256-bit block of instructions.
> >
> > This feature requires a header for use; in the simplest case, a header
> > may contain a 3-bit field that specifies how many 32-bit instruction words
> > are to be left unused at the end of a block.
> >
> > So I was avoiding NOP issues by saving old instruction blocks, and allowing
> > a pointer to a "pseudo-immediate" to point into a saved block instead of
> > the current block. Yes, that will require flexibility on the part of the
> > compiler; more work on its part, and it will be tricky to code. I think
> > it's possible in the current state of the art, though.
>
> OMG.
>
> The current state of the art is very much different from what you
> describe.
I spent my first 10 years doing compilers (1975-1983) and OS support
software. Even working inside compilers for years--so long ago-makes
it hard for even someone like me to even have a conversation about
what a compiler can and cannot do.
Which is why you HAVE TO get the compiler crawling if only to finish
ISA and have few glaring holes in it.
> >
> >> You don't have a compiler (obviously), but have you looked at actual
> >> code generated by compilers (for example on godbolt, which is very good)
> >> and checked which instruction sequence would fit which header?
> >
> > Not yet, I have to admit.
>
> This is an essential part of defining an architecture...
s/architecture/ISA/
ISA is only about 1/3rd of an architecture.
--- SoupGate-Win32 v1.05
* Origin: you cannot sedate... all the things you hate (1:229/2)
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