From: user5857@newsgrouper.org.invalid   
      
   John Levine  posted:   
      
   > It appears that Waldek Hebisch  said:   
   > >My idea was that instruction decoder could essentially translate   
   > >   
   > >ADDL (R2)+, R2, R3   
   > >   
   > >into   
   > >   
   > >MOV (R2)+, TMP   
   > >ADDL TMP, R2, R3   
   >   
   > But how about this?   
   >   
   > ADDL3 (R2)+,(R2)+,(R2)+   
   >   
   > Now you need at least two temps, the second of which depends on the   
   > first, and there are instructions with six operands. Or how about   
   > this:   
   >   
   > ADDL3 (R2)+,#1234,(R2)+   
   >   
   > This is encoded as   
   >   
   > OPCODE (R2)+ (PC)+ <1234> (R2)+   
   >   
   > The immediate word is in the middle of the instruction.  You have to decode   
   > the operands one at a time so you can recognize immediates and skip over   
   them.   
   > It must have seemed clever at the time, but ugh.   
   >   
      
   What we must all realize is that each address mode in VAX was a   
   microinstruction all unto itself.   
      
   And that is why it was not pipelineable in any real sense.   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)