From: cr88192@gmail.com   
      
   On 8/28/2025 9:52 PM, Stephen Fuld wrote:   
   > On 8/21/2025 1:49 PM, MitchAlsup wrote:   
   >>   
   >> Greetings everyone !   
   >   
   > snip   
   >   
   >> My 66000 ISA is in "pretty good shape" having almost no changes over   
   >> the last 6 months, with only specification clarifications. So it was time   
   >> to work on the non-ISA parts.   
   >   
   > You mention two non-ISA parts that you have been working on.  I thought   
   > I would ask you for your thoughts on another non-ISA part.  Timers and   
   > clocks.  Doing a "clean slate" ISA frees you from being compatible with   
   > lots of old features that might have been the right thing to do back   
   > then, but aren't now.   
   >   
   > So, how many clocks/timers should a system have?  What precision?  How   
   > fast does the software need to be able to access them?  I presume you   
   > need some comparitors (unless you use count down to zero).  Should the   
   > comparisons be one time or recurring?  What about syncing with an   
   > external timer?  There are many such decisions to make, and I am curious   
   > as to your thinking on the subject.   
   >   
   > If you haven't gotten around to working on this part of the system, just   
   > say so.   
   >   
      
   I don't know as much about his case, but can note in my case, I ended up   
   going with:   
      A 1kHz timer interrupt;   
      A 64-bit clock register with a 1us precision.   
      
   Also:   
      A cycle counter;   
      A random noise source.   
      
   Maybe a case could be made for a (probably virtual) 1ns clock register.   
   Though, one could in theory (on a faster CPU) estimate the ns time from   
   the cycle counter relative to the 1us timer; assuming the cycle counter   
   remains at a constant speed (note that it counts raw cycles, so isn't   
   necessarily tied to how many instruction-cycles have been performed).   
      
      
   Can note that MSP430 had the option of a 32kHz timer interrupt, but my   
   ISA design at 50 MHz can't manage a 32kHz interrupt without it eating   
   too much of the CPU.   
      
   I suspect this may be an issue of having a higher interrupt-handling   
   overhead than an MSP430.   
      
   >   
      
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