Forums before death by AOL, social media and spammers... "We can't have nice things"
|    comp.arch    |    Apparently more than just beeps & boops    |    131,241 messages    |
[   << oldest   |   < older   |   list   |   newer >   |   newest >>   ]
|    Message 129,573 of 131,241    |
|    John Savard to John Savard    |
|    Re: Concedtina III May Be Returning    |
|    04 Sep 25 10:33:12    |
      From: quadibloc@invalid.invalid              On Sun, 31 Aug 2025 06:17:07 +0000, John Savard wrote:              > Instead of a block header being used to indicate code consisting of       > variable-length instructions, variable-length instructions would be       > contained within a sequence of pairs of 32-bit instructions of this       > form:       >       > 11110xx(17 bits)(8 bits)       > 11111x(9 bits)(17 bits)              Making the basic unit 17 bits without externally indicating the       instruction length prevents a full 17-bit short instruction.              As this is inadequate, I considered abandoning the dream of Concertina III.              However, if I use both major chunks of opcode space formerly used for       headers or other items to be dropped, I can do this:              101xx(18 bits)(9 bits)       1111x(9 bits)(18 bits)              which means, though, that I now have to use a longer prefix portion on the       instructions with immediates, and this may possibly prevent them from       working out properly.              I also have 111001 available, a prefix of only 6 bits. If I use that for       immediates, how will it work out?              111010(10 bits)(16 bits)       111011(10 bits)(16 bits)              ...20 bits of instruction, for 32 bits of immediate. Since the instruction       proper needs 7 bits of opcode plus 5 bits of destination register, that       leaves 8 bits to distinguish the instruction from other kinds of       instruction with these prefixes. So far, so good.              111010(10 bits)(16 bits)       111011(2 bits)(24 bits)       111011(2 bits)(24 bits)              Fitting a 64-bit immediate into three words (rather than four) is also       still doable. It takes 1/4 of the available opcode space - but that's OK,       because nothing else has a similar problem, not 48-bit immediates, and not       128-bit immediates.              The only thing I do lose is being able to also have, as I had only very       recently introduced to Concertina II, the use of the 64-bit immediate       structure to have memory-reference instructions with 64-bit absolute       addresses.              John Savard              --- SoupGate-Win32 v1.05        * Origin: you cannot sedate... all the things you hate (1:229/2)    |
[   << oldest   |   < older   |   list   |   newer >   |   newest >>   ]
(c) 1994, bbs@darkrealms.ca