From: cr88192@gmail.com   
      
   On 9/4/2025 3:20 PM, Stephen Fuld wrote:   
   > On 9/4/2025 12:06 PM, EricP wrote:   
   >> Stephen Fuld wrote:   
   >>> On 9/4/2025 10:19 AM, EricP wrote:   
   >>>> BGB wrote:   
   >>>>> On 9/3/2025 9:42 PM, EricP wrote:   
   >>>>>> MitchAlsup wrote:   
   >>>>>>>   
   >>>>>>> However, I also found that STs need an immediate and a   
   >>>>>>> displacement, so,   
   >>>>>>> Major == 0b'001001 and minor == 0b'011xxx has 4 ST instructions with   
   >>>>>>> potential displacement (from D12ds above) and the immediate has   
   >>>>>>> the size of the ST. This provides for::   
   >>>>>>>          std    #4607182418800017408,[r3,r2<<3,96]   
   >>>>>>   
   >>>>>> Compare and Branch can also use two immediates as it   
   >>>>>> has reg-reg or reg-imm compares plus displacement.   
   >>>>>> And has high enough frequency to be worth considering.   
   >>>>>>   
   >>>>>   
   >>>>> Can be done, yes.   
   >>>>>   High enough frequency/etc, is where the possible debate lies.   
   >>>>>   
   >>>>>   
   >>>>> Checking stats, it can effect roughly 1.9% of the instructions.   
   >>>>> Or, around 11% of branches; most of the rest being unconditional or   
   >>>>> comparing against 0 (which can use the Zero Register). Only a   
   >>>>> relative minority being compares against non-zero constants.   
   >>>>   
   >>>> The only instruction usage stats I have are from those VAX papers:   
   >>>> A Case Study of VAX-11 Instruction Set Usage For Compiler Execution,   
   >>>> 1982   
   >>>>   
   >>>> That shows about 12% instructions are conditional branch and 9% CMP.   
   >>>> That says to me that almost all Bcc are paired with a CMP,   
   >>>> and very few use the flags set as a side effect of ALU ops.   
   >>>   
   >>> OK, but does this tell you how many of the CMPs are to a value of   
   >>> zero? I expect these to be a significant enough percentage to skew   
   >>> your analysis.   
   >>   
   >> Looking at   
   >> Measurement and Analysis of Instruction Use in VAX 780, 1982   
   >>   
   >> VAX had a TST instruction which was the same as CMP src,#0.   
   >> TST has < 2% usage while CMP 10-12%.   
   >   
   > Thanks.  That's interesting.  So perhaps ~15% of all compares are to   
   > zero.  I would have expected higher.   
   >   
      
   Looking at some stats generated by my compiler (for branches):   
     61% of branches are unconditional   
     15% are comparing to 0   
     13% are comparing two registers   
     11% are comparing to some other non-zero constant.   
      
   ...   
      
      
   It would be a bit higher than 11% if one only counts conditional   
   branches (it being around 28% of the conditional branches).   
      
   Where the unconditional branch count includes:   
      BRA/BSR/JAL   
      RTS/RET/JMP/JSR/JALR   
        In XG1/XG2, RTS is its own instruction.   
        In XG3 and RV, RTS (or RET) transforms into JALR.   
          JMP and JSR also map to JALR in RV and XG3.   
          Note that JALR doesn't exist in XG1 or XG2.   
      
      
   As noted, there is an average of around 6 instructions in each trace   
   (before it terminates with a branch).   
      
   ...   
      
      
   >   
      
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