From: ThatWouldBeTelling@thevillage.com   
      
   Thomas Koenig wrote:   
   > MitchAlsup  schrieb:   
   >> Thomas Koenig  posted:   
   >   
   >>> The CPU could speculate on the FP mode (not sure if that is actually   
   >>> done).  Other suggestions? How do current CPUs do so?   
   >> Multi-threaded cores already have to ship different RMs to FUs on   
   >> each FP instruction. The HW is all there--its the ISAs that are screwed   
   >> up.   
   >   
   > And that would be an interesting part - how to specify this   
   > efficiently, and allow the microarchiteture not to flush when   
   > rounding modes are changed.   
      
   It has to sync-wait for all older FP instructions to finish executing.   
      
   The x87 had separate control and status registers but   
   SSE merged this into a single Control Status Register MXCSR.   
   In order to read the current control bits it must also read the status bits,   
   and to read the status bits it must wait until all outstanding SSE FP   
   instructions have executed because the status register flags are defined   
   as the OR of all the older FP instruction flags. But the FP status bits   
   are not usually updated with control so reading them was unnecessary.   
      
   On way is to have separate control registers for FP control   
   (round mode RM, exception enables XE, etc) and FP status,   
   and separate instructions to read and write them.   
   Additionally one could have RM and other controls on each FP instruction   
   which would allow one to change the RM without having to save, set and   
   restore the control register.   
      
   Additionally the x64's LDMXCSR and STMXCSR instructions load and store   
   the current MXCSR value but *only with memory*, not to an integer register.   
   Not only should these be separate CR and SR registers,   
   the should allow the old CR to be saved/restored with an integer register.   
      
   What it looks like most users want is a combined "copy current FP CR to   
   integer register and set masked CR field to immediate or int register".   
   That allows users to save & set just the RM without a sync-wait or   
   touching memory with 1 instruction, and restore later.   
      
   However it is not clear if this would be suitable for Fortran as you say:   
      
   Thomas Koenig wrote:   
   > Fortran has an optional IEEE module.  One of its important features   
   > is that flags (IEEE exceptions) are set to quiet on entry of a procedure   
   > and restored to signalling if it was signalling on entry, or keep it   
   > signalling if it was raised on in the procedure.  Similarly, rounding   
   > modes are saved and restored for procedures.  This is automatically   
   > done if the right IEEE modules are used.  A user can set rounding   
   > modes or set and clear exceptions using the right modes.   
      
   This sounds like Fortran's defined FP status algorithm requires it   
   read the both current control and status,   
   then set the RM and mask exceptions and clear the status bits,   
   and later restore the old control flags, and optionally OR with old status.   
   Unfortunately reading the current status register forces the sync-wait.   
      
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