From: anton@mips.complang.tuwien.ac.at   
      
   MitchAlsup  writes:   
   >   
   >anton@mips.complang.tuwien.ac.at (Anton Ertl) posted:   
   >   
   >> EricP  writes:   
   >> >Anton Ertl wrote:   
   >> >> Thomas Koenig  writes:   
   >> >>> BGB  schrieb:   
   >-------------------------------   
   >>   
   >> Yes, so much is clear.  It's not clear where Macro-Ops are in play and   
   >> where Micro-Ops are in play.  Over time I get the impression that the   
   >> macro-ops are the main thing running through the OoO engine, and   
   >> Micro-Ops are only used in specific places, but it's completely   
   >> unclear to me where.  E.g., if they let an RMW Macro-Op run through   
   >> the OoO engine, it would first go to the LSU for the address   
   >> generation, translation and load, then to the ALU for the   
   >> modification, then to the LSU for the store, and then to the ROB.   
   >> Where in this whole process is a Micro-Op actually stored?   
   >   
   >In the reservation station.   
      
   Ok, so what I currently imagine is this: The macro-op contains tags or   
   (for non-valued reservation stations) register numbers for the   
   intermediate results.  It is sent to the affected reservation   
   stations, which picks the parts relevant for it out of the macro-op,   
   thus forming a micro-op.  If one of the reservation stations is full,   
   I expect that the macro-op is kept back in the front end.  The ROB   
   does not need to wait for each micro-op, but only for the last one in   
   the macro-op (if the micro-ops have one last one, which they have in   
   case of load-op instructions (the op is last) and RMW instructions   
   (the W is last).   
      
   - anton   
   --   
   'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'   
     Mitch Alsup,    
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)