From: tkoenig@netcologne.de   
      
   EricP  schrieb:   
   > MitchAlsup wrote:   
   >> My 66000 2.0   
   >>   
   >> After 4-odd years of ISA stability, I ran into a case where   
   >> I  needed to change the instruction formats.   
   >> And after bragging to Quadribloc about its stability--it   
   >> reached the point where it was time to switch to version 2.0.   
   >>   
   >> Well, its time to eat crow.   
   >> --------------------------------------------------------------   
   >> Memory reference instructions already produce 64-bit values   
   >> from Byte, HalfWord, Word and DoubleWord memory references   
   >> in both Signed and unSigned flavors. These supports both   
   >> integer and floating point due to the single register file.   
   >>   
   >> Essentially, I need that property in both integer and floating   
   >> point calculations to eliminate instructions that merely apply   
   >> value range constraints--just like memory !   
   >   
   > Why? Compilers do not have any problem with this   
   > as its been handled by overload resolution since forever.   
      
   A non-My66000 example:   
      
   int add (int a, int b)   
   {   
     return a + b;   
   }   
      
   is translated on powerpc64le-unknown-linux-gnu (with -O3 to)   
      
           add 3,3,4   
           extsw 3,3   
           blr   
      
   extsw fills the 32 high-value bits with because numbers returned   
   in registers have to be correct, either as 32- or 64-bit values.   
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    * Origin: you cannot sedate... all the things you hate (1:229/2)