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   comp.arch      Apparently more than just beeps & boops      131,241 messages   

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   Message 129,899 of 131,241   
   Michael S to Thomas Koenig   
   Re: Linus Torvalds on bad architectural    
   12 Oct 25 15:31:21   
   
   From: already5chosen@yahoo.com   
      
   On Sun, 12 Oct 2025 11:38:39 -0000 (UTC)   
   Thomas Koenig  wrote:   
      
   > Michael S  schrieb:   
   > > On Sun, 12 Oct 2025 10:14:08 -0000 (UTC)   
   > > Thomas Koenig  wrote:   
   > >   
   > >> Anton Ertl  schrieb:   
   > >> > Thomas Koenig  writes:   
   > >> >>There is something to be said for at least having a big-endian   
   > >> >>system around to test programs:  If people mismatch types, there   
   > >> >>is a chance that it will blow up on a big-endian system and work   
   > >> >>silently on a little-endian system.   
   > >> >   
   > >> > If the only thing wrong with the software is that it does not   
   > >> > work on big-endian systems, and little-endian has won, is there   
   > >> > really anything wrong with the software?   
   > >>   
   > >> A type mismatch?  I think so.   
   > >>   
   > >> >>And of course, this is all due to an architecture which is   
   > >> >>arguably the most influential of all times (or at least has the   
   > >> >>highest ratio of influence to recognition level, but that by a   
   > >> >>_huge_ margin): The Datapoint 2200.   
   > >> >   
   > >> > Another widely-used architecture today inherited its byte order   
   > >> > from the 6502.   
   > >>   
   > >> Which one?   
   > >   
   > > Arm.   
   >   
   > That does not have many architectural features from the 6502 :-)   
      
   It has the same byte order.   
      
   CZVN flags are superficially similar, although there is an important   
   difference - on ARM Z flag is not affected by non-arithmetic   
   instructions.   
      
   Also both processors appear to share a philosophy of design driven by   
   practicality rather than by theoretical principles. They are what they   
   are because that was a maximum that comfortably fit into available   
   budgets of all sorts rather than because of "closing semantic gap" or   
   conversly "reducing instruction set".   
      
      
   >   
   > >It was designed as CPU for successor of 6502-based BBC Micro.   
   > >   
   > > But does 6502 really have "byte order" in hardware? Or just "soft"   
   > > conventions of BBC BASIC interpreter?   
   >   
   > Yes, the 6502 is little-endian,   
   > which you can see in its instruction formats   
      
   That does not count. Instruction encoding is orthogonal to the question   
   of  byte order during execution. I had seen various combinations.   
   Including encodings that have no particular order, i.e. immediate field   
   scattered in instruction word. Not that I remember which architecture it   
   was.   
      
   > and the way the pointers in the zero page were stored.   
   >   
      
   Yes, I see.   
   Indirect addressing modes are clearly LE.   
   In case of JMP instruction 16-bit LE pointer does not even have to be in   
   zero page.   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)   

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