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   comp.arch      Apparently more than just beeps & boops      131,241 messages   

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   Message 130,095 of 131,241   
   Robert Finch to All   
   Re: Tonights Tradeoff   
   02 Nov 25 09:39:27   
   
   From: robfi680@gmail.com   
      
   Contemplating having conditional branch instructions branch to a target   
   value in a register instead of using a displacement.   
      
   I think this has about the same code density as having a branch to a   
   displacement from the IP.   
      
   Using a fused compare-and-branch instruction for Qupls4 there is not   
   enough room in the instruction for a large branch displacement (10   
   bits). So, my thought is to branch to a register value instead.   
   There is already an add-to-instruction-pointer instruction that can be   
   used to generate relative addresses.   
      
   By moving the register load outside of a loop, the dynamic instruction   
   count can be reduced. I think this solution is a bit better than having   
   compare and branch as two separate instructions, or having an extended   
   constant added to the branch instruction.   
      
   One gotcha may be that the branch target needs to be predicted as it   
   cannot be calculated earlier in the pipeline.   
      
   The 10-bit displacement format could also be supported, but it is yet   
   another branch instruction format. I may leave holes in the instruction   
   set for future support, but I think it is best to start with just a   
   single format.   
      
   Code:   
   AIPSI R3,1234	; add displacement to IP and store in R3 (hoist-able)   
   BLT R1,R2,R3		; branch to R3 if R1 < R2   
      
   Versus:   
   CMP R3,R1,R2   
   BLT R3,displacement   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)   

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