From: sfuld@alumni.cmu.edu.invalid   
      
   On 11/5/2025 1:21 PM, MitchAlsup wrote:   
   >   
   > Robert Finch  posted:   
   >   
   >> Qupls2026 currently supports 48-bit inline constants. I am debating   
   >> whether to support 89 and 130-bit inline constants as well. Constant   
   >> sizes increase by 41-bits due to the 48-bit instruction word size. The   
   >> larger constants would require more instruction words to be available to   
   >> be processed in decode. Not sure if it is even possible to pass a   
   >> constant larger than 64-bits in the machine.   
   >>   
   >> I just realized that constant operand routing was already in Qupls, I   
   >> had just not specifically identified it. The operand routing bits are   
   >> just moved into a postfix instruction word rather than the first   
   >> instruction word. This gives more bits available in the instruction   
   >> word. Rather than burn a couple of bits in every R3 type instruction,   
   >> another couple of opcodes are used to represent constant extensions.   
   >>   
   > My 66000 ISA has OpCodes in the range {I.major >= 8 && I.major < 24}   
   > that can supply constants and perform operand routing. Within this   
   > range; instruction<8:5> specify the following table:   
   >   
   > 0 0 0 0    +Src1    +Src2   
   > 0 0 0 1    +Src1    -Src2   
   > 0 0 1 0    -Src1    +Src2   
   > 0 0 1 1    -Src1    -Src2   
   > 0 1 0 0    +Src1    +imm5   
   > 0 1 0 1    +Imm5    +Src2   
   > 0 1 1 0    -Src1    -Imm5   
   > 0 1 1 1    +Imm5    -Src2   
   > 1 0 0 0    +Src1    Imm32   
   > 1 0 0 1    Imm32    +Src2   
   > 1 0 1 0    -Src1    Imm32   
   > 1 0 1 1    Imm32    -Src2   
   > 1 1 0 0    +Src1    Imm64   
   > 1 1 0 1    Imm64    +Src2   
   > 1 1 1 0    -Src1    Imm64   
   > 1 1 1 1    Imm64    -Src2   
   >   
   > Here we have access to {5, 32, 64}-bit constants, 16-bit constants   
   > come from different OpCodes.   
   >   
   > Imm5 are the register specifier bits: range {-31..31} for integer and   
   > logical, range {-15.5..15.5} for floating point.   
      
   Some time ago, we discussed using the 5 bit immediates in floating point   
   instructions as an index to an internal ROM with frequently used   
   constants.  The idea is that it would save some space in the instruction   
   stream.  Are you implementing that, and if not, why not?   
      
   --   
     - Stephen Fuld   
   (e-mail address disguised to prevent spam)   
      
   --- SoupGate-Win32 v1.05   
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