From: user5857@newsgrouper.org.invalid   
      
   Stephen Fuld  posted:   
      
   > On 11/11/2025 11:46 AM, MitchAlsup wrote:   
   > >   
   > > Niklas Holsti  posted:   
   >   
   >   
   > snip   
   > >> It is only if your machine has some semantics for instruction   
   > >> combinations, such as your VEC-LOOP pair, that you have to define what   
   > >> happens if a jump or call to some address leads to later executing only   
   > >> some of those instructions or executing them in the wrong order, such as   
   > >> trying to execute a LOOP without having executed a preceding VEC.   
   > >   
   > > BTW, encountering a LOOP without encountering a VEC is a natural   
   > > occurrence when returning from exception or interrupt. The VEC   
   > > register points at the VEC+1 instruction which is easy to return   
   > > to the VEC instruction.   
   >   
   > OK, but what if, say through an errant pointer, the code, totally   
   > unrelated to the VEC, jumps somewhere in the middle of a VEC/LOOP pair?   
      
   All taken branches clear the V-bit associated with vectorization.   
   So encountering the LOOP instruction would raise an exception.   
      
   Flow control WITHIN a VEC-LOOP pair is by predication-only.   
   Exception Control Transfer is special in this regards.   
      
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