From: user5857@newsgrouper.org.invalid   
      
   scott@slp53.sl.home (Scott Lurndal) posted:   
      
   > MitchAlsup  writes:   
   > >   
   > >scott@slp53.sl.home (Scott Lurndal) posted:   
   > >   
   >   
   > >> >Move Element from one place to another:   
   > >> >   
   > >> >BOOLEAN MoveElement( Element *fr, Element *to )   
   > >> >{   
   > >> >     Element *fn = esmLOCKload( fr->next );   
   > >> >     Element *fp = esmLOCKload( fr->prev );   
   > >> >     Element *tn = esmLOCKload( to->next );   
   > >> >     esmLOCKprefetch( fn );   
   > >> >     esmLOCKprefetch( fp );   
   > >> >     esmLOCKprefetch( tn );   
   > >> >     if( !esmINTERFERENCE() )   
   > >> >     {   
   > >> >                   fp->next = fn;   
   > >> >                   fn->prev = fp;   
   > >> >                   to->next = fr;   
   > >> >                   tn->prev = fr;   
   > >> >                   fr->prev = to;   
   > >> >     esmLOCKstore( fr->next,  tn );   
   > >> >                   return TRUE;   
   > >> >     }   
   > >> >     return FALSE;   
   > >> >}   
   > >> >   
   > >> >So, I guess, you are not talking about what My 66000 cannot do, but   
   > >> >only what other ISAs cannot do.   
   > >>   
   > >> In my 40 years of SMP OS/HV work, I don't recall a   
   > >> situation where 'MoveElement' would be useful or   
   > >> required as an hardware atomic operation.   
   > >   
   > >The question is not would "MoveElement" be useful, but   
   > >would it be useful to have a single ATOMIC event be   
   > >able to manipulate {5,6,7,8} pointers in one event ??   
   >   
   > Nothing comes immediately to mind.   
   >   
   > >   
   > >> Individual atomic "Remove Element" and "Insert/Append Element"[*], yes.   
   > >> Combined?   Too inflexible.   
   > >   
   > >BOOLEAN InsertElement( Element *el, Element *to )   
   > >{   
   > >     tn = esmLOCKload( to->next );   
   > >     esmLOCKprefetch( el );   
   > >     esmLOCKprefetch( tn );   
   > >     if( !esmINTERFERENCE() )   
   > >     {   
   > >                   el->next = tn;   
   > >                   el->prev = to;   
   > >                   to->next = el;   
   > >     esmLOCKstore( tn->prev,  el );   
   > >                   return TRUE;   
   > >     }   
   > >     return FALSE;   
   > >}   
   > >   
   > >BOOLEAN RemoveElement( Element *fr )   
   > >{   
   > >     fn = esmLOCKload( fr->next );   
   > >     fp = esmLOCKload( fr->prev );   
   > >     esmLOCKprefetch( fn );   
   > >     esmLOCKprefetch( fp );   
   > >     if( !esmINTERFERENCE() )   
   > >     {   
   > >                   fp->next = fn;   
   > >                   fn->prev = fp;   
   > >                   fr->prev = NULL;   
   > >     esmLOCKstore( fr->next,  NULL );   
   > >                   return TRUE;   
   > >     }   
   > >     return FALSE;   
   > >}   
   > >   
   > >>   
   > >> [*] For which atomic compare-and-swap or atomic swap is generally   
   sufficient.   
   >   
   > Yes, you can add special instructions.   However, the compilers will be   
   unlikely   
   > to generate them, thus applications that desired the generation of such an   
   > instruction would need to create a compiler extension (like gcc __builtin   
   functions)   
   > or inline assembler which would then make the program that uses the   
   capability both compiler   
   > specific _and_ hardware specific.   
      
   So, in other words, if you can't put it in every ISA known to man,   
   don't bother making something better than existent ?!?   
      
   > Most extant SMP processors provide a compare and swap operation, which   
   > are widely supported by the common compilers that support the C and C++   
   > threading functionality.   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)