From: tkoenig@netcologne.de   
      
   Robert Finch  schrieb:   
      
   [...]   
   > I made a 36-bit ISA a while ago on the notion of average instruction   
   > size (18-bit compressed instructions). Writing the assembler for it was   
   > something special. Took about 10x as much effort as a byte-oriented one.   
   > So, I am not keen on non-byte sizes. But maybe another 36-bitter. Takes   
   > a bit to get used to addressing for the instruction pointer.   
      
   You'd probably need 128-bit bundles with a granularity of 18 bits.   
   This is certainly doable (see Itanium) but very probably not fun   
   to write.  The instruction pointer would then be 18-bit aligned,   
   with one out of eight addresses invalid.   
      
   Hm... if there were instructions which could span several bundles,   
   the two left-over bits could be used for synchronization, to trap   
   branches which land in the middle of instructions, or for something   
   else.   
      
   If your architecture has 64 registers, it could probably use   
   the extra encoding space vs. 32.   
      
   --   
   This USENET posting was made without artificial intelligence,   
   artificial impertinence, artificial arrogance, artificial stupidity,   
   artificial flavorings or artificial colorants.   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)