From: robfi680@gmail.com   
      
   On 2025-12-26 4:57 p.m., Thomas Koenig wrote:   
   > (This might be blindingly obvious to most regulars, but I thought   
   > I'd post this, just in case for some discussion)   
   >   
   > SIMD is not always about vectorizing loops, they can also be used   
   > for tree-shaped reductions (not sure what the canonical name is).   
   >   
   > Consider the following problem:  You have 128 consecutive bytes and   
   > want to find the minimum value, and you have 512-bit SIMD registers.   
   >   
   > You load the values into two 512-bit = 64 byte registers A and B, into   
   > positions A<0:7>, A<8:15>, ... A<504:511>, and B correspondingyl.   
   >   
   > You do a SIMD 8-bit "min" operation.  The target c register contains   
   > the minimum values: min(A<0:7>,B<0:7>), min(A<8:15>,B<8:15>, ...   
   > min(A<504:511>,b<504:511>).  C need not be distinct from A or B.   
   > You then have 64 values.   
   >   
   > You then move the upper values of C into register D (which need not   
   > be distinct from A or B), giving you D<0:7=min(A<256:263>,B<256:263)   
   > etc.   
   >   
   > You then do the min operation with half the length of the registers,   
   > giving you 32 values.   
   >   
   > And so on, until you have the single value, which is reached in   
   > seven steps.   
   >   
   > This kind of thing is, AFAIK, used in high-performance code such   
   > as JSON parsers or regexp matchers.  An example (in principle)   
   > can be found at https://gitlab.ethz.ch/extra_projects/fastjson/ .   
   >   
   > Just wondering... is this somethig that VVM or similar could   
   > also do? Or does this actually require SIMD and the necessary   
   > shift, rotate or permute intructions?   
      
   RISCV IIRC has several reduction operations including min that finds the   
   minimum of all the values in a vector register so I think it does not   
   need a tree. It should only take two steps. I wonder if other   
   architectures have the same thing.   
      
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