From: user5857@newsgrouper.org.invalid   
      
   anton@mips.complang.tuwien.ac.at (Anton Ertl) posted:   
      
   > EricP  writes:   
   > >Thomas Koenig wrote:   
   > >> Using a primitive Perl script to catch occurences, on a recent   
   > >> My 66000 cmopiler, of the shape   
   > >>   
   > >> 	[op] Ra,Ra,Rb   
   > >> 	[op] Ra,Rb,Ra   
   > >> 	[op] Ra,#n,Ra   
   > >> 	[op] Ra,Ra,#n   
   > >> 	[op] Ra,Rb   
   > >>   
   > >> where |n| < 32, which could be a reasonable approximation of a   
   > >> compressed instruction set, yields 14.9% (Perl), 16.6% (gnuplot)   
   > >> and 23.9% (GSL) of such instructions.  Potential space savings   
   > >> would be a bit less than half that.   
   > >>   
   > >> Better compression schemes are certainly possible, but I think the   
   > >> disadvantages of having more complex encodings outweigh any   
   > >> potential savings in instruction size.   
   >   
   > The RISC-V people brag about how little their compressed encoding   
   > costs to decode; IIRC it's in the hundreds of something (not sure if   
   > transistors or gates).  Of course, with superscalar decoding the   
   > compressed instruction set costs additional decoders plus logic to   
   > select which decodings do not belong to actual instructions, but   
   > that's true for any 16+32-bit encoding, however simple.   
      
   It may not take "that many gates", but it screws up register specifier   
   routing to RF. They also brag that instruction fusion has a 400 gate   
   cost. On the other hand, I brag that My 66000 variable length instruction   
   only needs 40 gates to "decode".   
      
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