From: monnier@iro.umontreal.ca   
      
   Anton Ertl [2025-12-30 17:15:59] wrote:   
   > Michael S  writes:   
   >>Imagine code that overwrites the whole cache line that core initially   
   >>did not own. Under TSO rules, like x86, the only [non heroic] ways to   
   >>overwrite the line without reading its previous content (which could   
   >>easily mean reading from DRAM) are   
   >>- aligned AVX512 store   
   >>- rep movs/rep stos   
   > Any sequence of stores without intervening loads can be turned into   
   > one store under sequential consistency, and therefore also under the   
   > weaker TSO.  Doing that for a sequence that stores into one cache line   
   > does not appear particularly heroic to me.  The question is how much   
   > benefit one gets from this optimization.   
      
   But the stores may be interleaved with loads from other locations!   
   It's quite common to have a situation where a sequence of stores   
   initializes a new object and thus overwrites a complete cache line, but   
   that initialization sequence needs to read from memory (e.g. from the   
   stack).   
      
   Maybe compilers can be taught to group such writes to try and avoid   
   the problem?   
      
      
           Stefan   
      
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