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   comp.arch      Apparently more than just beeps & boops      131,241 messages   

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   Message 130,699 of 131,241   
   Chris M. Thomasson to BGB   
   Re: Variable-length instructions   
   30 Dec 25 14:58:24   
   
   From: chris.m.thomasson.1@gmail.com   
      
   On 12/30/2025 11:10 AM, BGB wrote:   
   [...]   
      
   > But, then again, weak model is cheaper to implement and generally   
   > faster, although explicit synchronization is annoying and such a model   
   > is incompatible with "lock free data structures" (which tend to   
   > implicitly assume that memory accesses occur in the same order as   
   > written and that any memory stores are immediately visible across threads).   
      
   Fwiw, a weak memory model is totally compatible with lock-free data   
   structures. A weak model tends to have the necessary memory barriers to   
   make them work. Have you ever used a SPARC in RMO mode? Acquire membar   
   ala std::memory_order_acquire is basically a MEMBAR #LoadStore |   
   #LoadLoad. A release is MEMBAR #LoadStore | #StoreStore. Those can be   
   used for the implementation of a mutex. Notice how acquire and release   
   never need #StoreLoad ordering?   
      
   The point is that once we have this flexibility, a lock/wait free algo   
   can use the right membars for the job. Ideally, the weakest membars they   
   can use to ensure they are correct in their logic.   
      
   [...]   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)   

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