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   comp.arch      Apparently more than just beeps & boops      131,241 messages   

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   Message 130,736 of 131,241   
   MitchAlsup to All   
   Re: A typical non-loop use case for SIMD   
   02 Jan 26 18:52:50   
   
   From: user5857@newsgrouper.org.invalid   
      
   Stephen Fuld  posted:   
      
   > On 1/1/2026 2:21 PM, Anton Ertl wrote:   
   > > Stephen Fuld  writes:   
   > >> Note also that this works well for min (and max), but for add, etc. if   
   > >> the data is unsigned only if you don't care where in the sequence an   
   > >> overflow occurred, but but if the data is signed, only if you don't even   
   > >> care if overflow occurred.   
   > >   
   > > Addition with trapping on overflow or with overflow detection is not   
   > > associative.  Addition modulo 2^n is.   
   >   
   > Yes.  You have given a more precise mathematical statement of of what I   
   > said above.   
      
   Just ANNOTHER reason the default integer should be UNSIGNED.   
      
   > >   
   > > If you have a sticky overflow bit (Power has something in that   
   > > direction), or if you trap on overflow (MIPS and Alpha have such   
   > > instructions for signed addition), you will certainly notice if an   
   > > overflow occured for signed additions for the particular evaluation   
   > > used on the machine.  If there are evaluations with and without   
   > > overflow, I think that those without are preferable (although probably   
   > > not enough to pay the performance cost for ensuring that).   
   > >   
   > > Which programming language are you thinking of where reduction uses   
   > > some addition with overflow detection.   
   >   
   > I wasn't thinking of any programming language in particular.  I was   
   > trying to clarify my "astonishment" and work through the details of what   
   > Mitch said earlier about SIMDifying the calculations in the context of   
   > VVM.  I was trying to understand exactly what the hardware was doing in   
   > the various cases.   
   >   
   >   
      
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