From: cr88192@gmail.com
On 2/10/2026 1:04 PM, MitchAlsup wrote:
>
> Robert Finch posted:
>
>> On 2026-02-09 5:27 p.m., BGB wrote:
>>> On 2/9/2026 2:44 PM, EricP wrote:
> ------------------------------------
>>
>> I found a slide presentation on the idea.
>>
>> I am wondering how a LRU system would work with the skewed entries.
>> I assume the entries would be shifting between the ways for LRU. So, if
>> there is a different size page in one of the ways would it still work?
>
> One would use the not-recently-used variant of LRU.
> One accumulated used bits on a per set basis.
> When all used-bits have been set, one clears
> all used bits.
>
> In practice it is easier to implement and almost as good.
FWIW:
I ended up not using an MRU or LRU for the TLB.
While there is a loss of efficiency here (it always evicts the oldest
page rather than the least-used), it does mean that the TLB miss handler
can model the TLB deterministically (if the handler knows the length and
width; it can be modeled exactly).
Potentially a clever TLB miss handler could compensate by re-injecting
the page that fell off the end if it is very likely to trigger another
TLB miss (possibly tracking commonly-missed pages in an STF MRU or
similar in software, and re-injecting pages that appear within this MRU
at a higher rank than whatever is in the current last place).
Another theoretical possibility would be to allow the CPU to access the
contents of the TLB via MMIO, but there are strong reasons to not do
this. So, naive FIFO ended up being preferable. The other possibility
being to have LRU, but then needing to fully evict a given set whenever
a pages' attributes are modified (such as a page swapped in or out of
the pagefile).
It is tradeoffs here...
--- SoupGate-Win32 v1.05
* Origin: you cannot sedate... all the things you hate (1:229/2)
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