From: robfi680@gmail.com   
      
   On 2026-02-15 7:14 a.m., David Brown wrote:   
   > On 15/02/2026 09:58, Robert Finch wrote:   
   >   
   >> I wonder how difficult it would be to implement a parallel tester in   
   >> an FPGA. It looks simple enough and there are hundreds of DSP blocks   
   >> available to use. Could test in blocks of hundreds of numbers at a time.   
   >> Running at 100 MHz * 200 tests at a time = how long to get to 2^71?   
   >>   
   >   
   > One of the nice things about this is that you don't need DSP blocks - it   
   Yeah, I figured that out after coding. 3n+1 = n+n+n+1   
      
   > all works well with very simple operations well-suited to an FPGA.  Your   
   > calculation blocks would hold an n-bit number (wider than the number you   
   > are testing for, since rounds of the Collatz function can grow a lot)   
   > and a counter.  Initialise the block to the number you want to test. For   
   > each round, check the LSB.  If it is 0, right-shift your register. If it   
   > is even, replace "x" with "(x << 1) + x".  That's just some simple logic   
      
   Oops. I thought that was x = (x >> 1) if it is even. I coded it   
   stupidly. It may not matter in FPGA logic. All the bits goo into LUTs   
   and it get figured out.   
      
   > - no DSP blocks involved.  If your register or your counter overflow,   
   > you've found an "interesting" number and can pass that out to a PC to   
   > test it fully.   
   >   
   I have coded a version that tests up to 8192 number simultaneously. It   
   is supposed to be able to run at over 200 MHz. Some of the number would   
   take a large number of iterations though.   
      
   I found something strange, the code to count for more numbers does not   
   increase the size of the core very much. (But it takes longer to build.)   
   I am not sure if this occurs because there is a mitsake somewhere, or if   
   the tools are able to figure out how to share all the logic. I am   
   thinking the logic for adders is shared somehow. 128-bit arithmetic is   
   being used.   
      
      
   > There's lots of scope for both high-level work (the housekeeping and   
   > tracking of operations for each of your worker elements) and low-level   
   > work (getting the carry operations to work at high speed).   
   >   
   Yeah, I am wondering how to display results without using a CPU. I was   
   thinking a running indicator of the current number group under test. I   
   was going to have it stop after the number exceeds 128-bits.   
      
   >> I wonder if the calculation can be broken down further. Numbers are   
   >> all just defined by rules. I wonder if some calculus may apply. Limit   
   >> of function approaches one for a finite number of steps. There may be   
   >> a whole range of algorithms, is there one for the number two? Then the   
   >> number three?   
   >>   
   >> Occasionally I have made useless machinery. Great puzzle work. Made   
   >> the game of life in hardware.   
   >>   
   >   
      
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