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|    comp.lang.asm.x86    |    Ahh, the lost art of x86 assembly    |    4,675 messages    |
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|    Message 2,892 of 4,675    |
|    wolfgang kern to James Van Buskirk    |
|    register names    |
|    21 Jul 17 20:14:36    |
      From: nowhere@never.at              James Van Buskirk wrote:              >> Kind of funny that Intel should list RAX, RCX, RDX, RBX, RSP, RBP, RSI,       >> and RDI       >> in the wrong order in Fig. 1 :)       >       > Just to follow up on my own message, it may seem that the order only       > has meaning for really low-level code where the programmer is looking       > at the machine language, but consider what happens with 64-bit       > addressing: format MS64              [list of opcodes ..]              not much changed from 16-bit to 32-bit to 64-bit opcodes:              register numbers within opcodes remained (except for specials)       r/eax=0 r/ecx=1 r/edx=0 r/ebx=3 r/esp=4 r/ebp=5 r/esi=6 r/edi=7       the specials are:       06 in 16 bit mode means [address]       05 in 32 bit mode means [address], RIP in 64 bit mode       04 in 32/64 modes mean SIB       and 64 bit mode allow also Zxd 32 or full 64-bit beside access to       all the low bytes from GP-regs.              > the above listing generated by FASM, it can be seen that       > we can't address off of RSP without an SIB byte because the       > mod r/m encoding that would correspond to RSP instead       > call out the presence of an SIB byte, so an SIB byte is required       > even for an effective address of [RSP+offset]. This is echoed       > with R12.              Have you ever tried 48 8b 24 24 MOV RSP,[RSP] ? (64 bit)              > Similarly, the encoding for an effective address of [RBP]       > ends up being occupied by [RIP+offset] so you need to       > specify an effective address of [RBP+0] to encode [RBP].       > Again, this is echoed with R13.              yes, but we can have both:              48 8b 45 00 MOV RAX,[RBP+0] almost same issue as 16 bit       8b 46 00 MOV ax,[bp+0]              48 8b 05 04 03 02 01 MOV RAX,[RIP+0x01020304] in 64bit       8b 05 01 02 03 04 MOV eax,[0x04030201]              > If you didn't know the register order, you wouldn't know       > that addressing off of R12 and R13 is a little funky like       > addressing off of RSP and RBP, so you might and end with       > some longer encodings than you would if you planned       > register allocations taking this into account.              Yes, so whenever you program for 64-bit you should know the       difference to 32bit code.       smart tools will anyway show what's possible and what's not.       __       wolfgang              --- SoupGate-Win32 v1.05        * Origin: you cannot sedate... all the things you hate (1:229/2)    |
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