From: bc@nospicedham.freeuk.com   
      
   On 22/07/2017 18:01, James Van Buskirk wrote:   
   >> "Bartc"  wrote in message news:XYrcB.450230$h63.447420@fx34.am4...   
      
   >> What's the right order, as you have it? The only odd thing is that SP   
   >> and BP usually go together. But the underlying register codes give a   
   >> different order again, so that RDX follows RAX.   
   >   
   > I consider the 'right' order to be as above.  See 325462.pdf, top of   
   > Table 2-2, Vol 2A, p. 2-6.  Note that RDX follows immediately after   
   > RCX in order.   
      
   OK, the order is AX, CX, DX and DX (then SP, BP, SI and DI). This is the   
   same ordering as shown on the original 8086 data-sheet for the reg field.   
      
   (325462.pdf refers to an Intel manual, but it's hard to find in the   
   combined version. The table is in volume 2, section 2.1.5 working from   
   the contents.)   
      
   >> For me, x64 register names were enough of a mess that I used my own   
   >> naming scheme, where the 16 registers are called D0 to D15, with   
   >> macros used to map to underlying registers.   
   >   
   >> (Actually I use D0 to D15 for 64-bit registers, A0..A15, W0..W15 and   
   >> B0..B15 for 32-, 16- and 8-bit registers respectively.)   
   >   
   > Now the question arises as to whether the 8-bit registers map   
   > {AH CH DH BH} or {SPL BPL SIL DIL}.  How does your scheme   
   > choose between these possibilities?   
      
   I make little use of these, but the mapping I have is this for byte   
   registers B0 to B13 using the lower order byte of each:   
      
   %define B0 al   
   %define B1 bl   
   %define B2 sil   
   %define B3 dil   
   %define B4 r10b   
   %define B5 r11b   
   %define B6 r12b   
   %define B7 r13b   
   %define B8 r14b   
   %define B9 r15b   
      
   %define B10 cl   
   %define B11 dl   
   %define B12 r8b   
   %define B13 r9b   
      
   For AH etc I use:   
      
   %define BH0 ah   
   %define BH1 bh   
   %define BH10 ch   
   %define BH11 dh   
      
   (I don't define bye versions of RBP and RSP)   
      
      
   >> That leaves D0 to D9 free for use without a big hole in the middle   
   >> where parameters are passed.   
   >   
   > I hope I won't have to maintain your code:)   
      
   Mainly this is used for code generation from a compiler. But when   
   writing inline assembly, I use the same scheme.   
      
   Otherwise you have these register names:   
      
     8-bit     16-bit     32-bit    64-bit   
      
     DIL       DI         EDX       RDX   
     CL        CX         ECX       RDX   
     R8L/R8B   R8W        R8D       R8   
      
   Notice how the naming scheme changes rather unsubtly between the first   
   and second blocks of 8 registers?   
      
   (I had to go and look these up to get them right. That shouldn't be   
   necessary; it's hard enough writing assembly code.)   
      
      If everyone uses a   
   > different mapping for the integer register set it seems to me to   
   > be a source of confusion.  As I remarked elsewhere, there is a   
   > little difference depending on register selection.  When the 8   
   > high registers requiring a REX byte are mixed in with the 8 low   
   > registers that don't always do so, it can make it more difficult   
   > to remember which registers lead to smallest code, and that's   
   > aside from the [RSP RBP] vs. [R12 R13] consideration.   
      
   If you're writing code for x64 which will almost certainly have multi-GB   
   of RAM available, is this still important?   
      
   --   
   bartc   
      
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