From: bc@nospicedham.freeuk.com   
      
   On 23/07/2017 15:55, James Van Buskirk wrote:   
   > "Bartc"  wrote in message news:Eu1dB.480685$lu5.423680@fx42.am4...   
   >> I've used AC0 to AC15 before, but that's rather old-fashioned. So I   
   >> decided on D0 to D15, with a register size also encoded within the   
   >> register name, 'D' meaning 64 bits. (I think D0 to D15 were used as   
   >> 32-bit data registers on the 68K.)   
   >   
   > Given that B stands for byte and W stands for word, how is it   
   > that A stands for doubleword and D for quadword?   
      
   Yeah, there were a number of possibilities. In the HLL which is compiled   
   to this ASM, 'word' is a 32-bit type, and 'dword' is 64 bits. So B, H, W   
   and D could have been chosen (H is for 'half-word').   
      
   I can't remember why 'A' was chosen unless it was for 'Accumulator' (as   
   used on the first machine I programmed in the seventies).   
      
   But within Nasm, which uses register names to denote width, B, W, D and   
   Q would have made more sense given a 16-bit word size. More sense at   
   least that what we eventually ended up with.   
      
   Note that XMM registers don't specify a width (ie. 32- or 64-bit scalar   
   size, rather than X/Y/Z meaning 128/256/512-bit total vector size),   
   which is derived from a combination of opcode and general purpose   
   register when it is used.   
      
   --   
   bartc   
      
   --- SoupGate-Win32 v1.05   
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