From: p1299721@nospicedham.protonmail.com   
      
   Looking at the Intel 64 and IA-32 Architectures Software Developer’s   
   Manual Volume 2 (2A, 2B, 2C & 2D): I see the definition of DIV says:   
      
   Unsigned divide EDX:EAX by r/m32, with result stored in EAX (Quotient),   
   EDX (Remainder).   
      
   So EAX:=EDX:EAX/n remainder EDX.   
      
   But it also says the maximum quotent is 2^32-1, so why does it need two   
   32 bit registers for the quotent? (AL=8,AX=16,EAX=32,RAX=64).   
      
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