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   comp.lang.asm.x86      Ahh, the lost art of x86 assembly      4,675 messages   

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   Message 4,528 of 4,675   
   Paul Edwards to anti...@nospicedham.math.uni.wroc.p   
   Re: TF   
   05 Dec 22 11:53:59   
   
   From: mutazilah@nospicedham.gmail.com   
      
   On Tuesday, December 6, 2022 at 3:22:42 AM UTC+8, anti...@nospic   
   dham.math.uni.wroc.pl wrote:   
      
   > equivalent or better functionality. In 1975 typical   
   > microprocessor needed external support chips, so there was   
   > understandable resistance to putting something which was   
   > not essential to running programs in processor chip.   
      
   But was this more of a philosophical thing? I think   
   even cheap CPUs in 1975 have flag registers, so   
   adding a TF to trigger int 1 seems like not a lot of   
   effort. Would it have increased the price of a CPU   
   by more than 0.1%?   
      
   And why does the 8086 have that when other processors   
   didn't for whatever reason?   
      
   > And once we speak about external chips, folks who wanted   
   > could add equivalent of debug registers using external   
   > chips. Mass produces machines skipped debugging support   
   > for cost reasons.   
      
   And this is the problem I would like to avoid. At least with   
   the benefit of hindsight, we know that programmers are   
   going to lose decent debug support if you don't put the   
   basic (breakpoints and TF) debug support into the CPU   
   itself.   
      
   BTW, I only learnt about this INT 1 and 3 mechanism   
   about a year ago.   
      
   I can't remember if I mentioned it, but PDOS/86 and   
   PDOS/386 (from pdos.org) now support a "monitor"   
   that uses those two facilities.   
      
   BFN. Paul.   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)   

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