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|    comp.compilers    |    Compiler construction, theory, etc. (Mod    |    2,753 messages    |
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|    Re: Pitfalls in interference graph ?    |
|    18 Oct 07 12:52:58    |
      From: SidTouati@inria.fr              Rayiner Hashem a icrit :              > Huh? Where is the dependence on sequential processing in graph       > coloring allocation? Moreover, only a few non mainstream archs expose       > non sequential semantics at the ISA level anyway.       >              Colouring hurts ILP extraction for both superscalar VLIW and EPIC       processors. Even if the ILP is not exposed at the architectural level,       compilers schedule operations to help the processor to extract it at       execution time.              If register allocation with coloring methods are used, the ILP of the       generated code would not be easily extracted by the processor at       execution time. Dynamic renaming is limited in practice (since the       window od instructions is limited).              --- SoupGate-Win32 v1.05        * Origin: you cannot sedate... all the things you hate (1:229/2)    |
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