From: Colin_Paul_Gloster@ACM.org   
      
   On Wed, 9 Aug 2006, Kenn Heinrich wrote:   
      
   "[..]   
      
   The background for this is an ML VHDL parser, which is basically a set   
   of workarounds for a set of workarounds for a set of almost-yaccable   
   grammar productions. Every fix to the parsing and analysis phase   
   re-breaks the last bug fix, so automatic test and regression is a   
   necessity."   
      
   Perhaps the VHDL validation and benchmark examples from   
   HTTP://Mikro.E-Technik.Uni-Ulm.De/vhdl/vhdl_utilities.html   
   may be helpful.   
      
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