In article <2025Jun28.122351@mips.complang.tuwien.ac.at>,   
   Anton Ertl  wrote:   
   >minforth  writes:   
   >>Most CPUs have operators for register-based count-down loops   
   >>that are blazingly fast.   
   >   
   >Which "operators" do you have in mind, and what do you mean with   
   >"blazingly fast".   
   >   
   >Anyway, we have discussed this repeatedly, e.g., in   
   ><2022Feb13.231208@mips.complang.tuwien.ac.at> I wrote in reply to your   
   >posting , and   
   >cited earlier discussions in the topic.   
   >   
   >|"minf...@arcor.de"  writes:   
   >[...]   
   >|>F.ex. match NEXT efficiently to x_86 processor LOOP instruction (counter in=   
   >|> _CX register)   
   >|>and you'll happily count down from 5 to 1.   
   >|   
   >|Yes, but why would one do this?  As we have established in an earlier   
   >|discussion (see below), the LOOP instruction is typically not faster   
   >|than a sequence of simpler instructions:   
   >|   
   >|<2018Jun6.184616@mips.complang.tuwien.ac.at>:   
   >||minforth@arcor.de writes:   
   >||>FOR..NEXT matches easily with the x86 LOOP instruction and ECX as counter.   
   >||>Should do speedy enough.  ;-)   
   >||   
   >||Have you measured it?  I have   
   >||<2017Mar14.183125@mips.complang.tuwien.ac.at>   
   >||<2017Mar15.141411@mips.complang.tuwien.ac.at> and compared the   
   >||following loops:   
   >||   
   >||.L5:                            .L5:   
   >||     subq    $1, %rax            loop    .L5   
   >||     jne     .L5   
   >||   
   >||I found that for these loops Sandy Bridge, Haswell, and Skylake take   
   >||~4 cycles per iteration using LOOP, and 1-2 cycles per iteration when   
   >||using jne.   
   >|   
   >|<2018Jun7.141731@mips.complang.tuwien.ac.at>:   
   >||cycles for 1000 iterations   
   >||  K10        Excavator       Zen   
   >||Phenom II  Athlon X4 845  Ryzen 1600X   
   >||  3021        1314            1051     loop   
   >||  2020        1484            1051     sub; jne   
   >||  2026        1489            1053     add; cmp; jne   
   >|   
   >|There is no performance advantage on modern AMD and Intel CPUs for the   
   >|instruction LOOP over a good implementation of the Forth word LOOP (as   
   >|in the third example).   
   >   
   >>If they can be used within Forth-based loop constructs   
   >>I would expect a greater speed increase than what you measured.   
   >   
   >You obviously ignore repeated refutations of your claims of superior   
   >performance for LOOP-instruction-based counted loops.  Maybe you   
   >should implement and measure such a counted loop yourself and compare   
   >it to the LOOP word on SwiftForth and VFX Forth.   
      
   It is good to remember how the severe CISC instruction came about.   
   Early Intel processors 8086 were severely cramped in memory space.   
   While the 16 bit 68000 has a generous 32 bit space, they were restricted   
   to 16 bit. They added a segmented memory and 1 byte version for two byte   
   instructions until finally the 386 arrived.   
   Compiler writers were not inclined to gain (or even loss) a moderate speed   
   advantage to save a few bytes.   
   There is more to it.   
   The first thing e.g. I had to do in my optimiser to expand 1 byte   
   instructions to not explode the possibilities I had to consider.   
      
   >   
   >- anton   
      
   Groetjes Albert   
   --   
   The Chinese government is satisfied with its military superiority over USA.   
   The next 5 year plan has as primary goal to advance life expectancy   
   over 80 years, like Western Europe.   
      
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